PhD Thesis Defense: PRASAD KUMAR BANDAHALLI MALLAPPA

Títol: Design and Implementation of High-Level Multilevel Inverters: Focusing on 15-level, 25-level, and 33-level Topologies with Asymmetrical Configuration and Optimal Component Choices Direcció : MARTINEZ GARCIA, HERMINIO Codirector: VELASCO QUESADA, GUILLERMO

When

Nov 21, 2024 from 11:30 AM to 02:00 PM (Europe/Madrid / UTC100)

Where

Sala Polivalente A0.03. Planta 0. Edificio "A" de la EEBE del Campus Diagonal-Besòs

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