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X-WR-TIMEZONE:Europe/Madrid
BEGIN:VEVENT
SUMMARY:PhD Thesis Defense: PRASAD KUMAR BANDAHALLI MALLAPPA
DTSTART;TZID=Europe/Madrid:20241121T113000
DTEND;TZID=Europe/Madrid:20241121T140000
DTSTAMP:20260416T135637Z
UID:b877ded20d044ae1ab1f22a265a3337a@electronicengineering.phd.upc.edu
CREATED:20241113T083646Z
DESCRIPTION:Títol: Design and Implementation of High-Level Multilevel Inv
 erters: Focusing on 15-level\, 25-level\, and 33-level Topologies with Asy
 mmetrical Configuration and Optimal Component Choices\nDirecció : MARTINE
 Z GARCIA\, HERMINIO\nCodirector: VELASCO QUESADA\, GUILLERMO
LAST-MODIFIED:20241113T083656Z
LOCATION:Sala Polivalente A0.03. Planta 0. Edificio "A" de la EEBE del Cam
 pus Diagonal-Besòs
URL:https://electronicengineering.phd.upc.edu/en/events/phd-thesis-defense
 -prasad-kumar-bandahalli-mallappa
END:VEVENT
BEGIN:VTIMEZONE
TZID:Europe/Madrid
X-LIC-LOCATION:Europe/Madrid
BEGIN:STANDARD
DTSTART:20241027T020000
TZNAME:CET
TZOFFSETFROM:+0200
TZOFFSETTO:+0100
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