QINE-Low Power Design, Test, Verification, and Fault Tolerance

The global goal of the Research Group is to advance in new design methodologies for electronic circuits and systems and increase their quality by assuring their correct functionality. The objectives of the research are centered in three domains. One of the objectives deals with the advancement of the design techniques for low power circuits and systems in nanometric CMOS technologies. In the domain of increasing functional quality the objective of the Group is to innovate in methods of Testing, Auto-test and signal integrity analysis of analog, digital and mixed-signal circuits. Finally, a third objective considers techniques to increase the functional quality by "fault tolerance" of faults escaping the methods of test of circuits and systems.

• Group research page: https://qine.upc.edu/
• Publications of the group in the Futur web page
• Contact address:

Escola Tècnica Superior d'Enginyers Industrials de Barcelona (ETSEIB)
Electronics Engineering Department
Av. Diagonal 647, P9 08028 Barcelona (Catalonia) SPAIN
Phone: +34 934 016 603
Coordinating Professors: Rosa Rodríguez
E-mail : rosa.rodriguez@(upc.edu)